Max Frequency of Internal EIP IO Cards and TriggLIOs command
Has anybody previously pushed the Internal IO cards to a "high" frequency and noticed unstable behavior?
I'm wanting to generate a virtual encoder pulse to a 3D camera system along a linear but non-Cartesian aligned path (i.e, the linear vector has x,y and z components)
- This is on a Line profiler, not a snapshot unit
Others I've talked have prior setup a constant velocity motion path, and trigger frequency within the camera; I'd rather not take that approach as it is a bit iffy in many ways, and I think that is the route cause in may of the continual issues production issues on these prior systems.
The below seems, legit in terms of documentation, following the code, having the robot do moves offline; but I have my doubts if it will actually be that stable on a real machine. We can't really measure it and I'm guessing what will happen is we get these "random" glitches once running in a production environment.
- The specification sheet ,mentions a output response delay of up to 0.5ms, which in theory means I could produce a 2kHz pulse output if I use both edges.
- The only way I then to continually produce this train is a for/while loop containing a TriggLIOs command an array triggdata array that I continually cycle though across the inspection zone.
The sources I've error I'm concerned with is the jitter/buffering on the EIP network (Device net might have had change of state, but in EIP its really pseudo change of state still limited by the cyclic RPI)
The synchronization between TriggLIO. Surely it will be stable within TriggLIO's travel, but could get messy with start and end zones between each separate call.